Shallow trench isolation (STI) is employed to isolate integrated circuit elements in a semiconductor wafer. A conventional STI process includes forming and patterning a silicon nitride layer on a silicon substrate, etching a trench in the substrate, and filling the trench with an oxide. The isolation oxide is then formed by chemical-mechanical polishing of the oxide in the trench using the silicon nitride as an etch-stop, followed by stripping the silicon nitride. STI has gained popularity because it allows for higher device density than LOCOS isolation.
STI is typically formed prior to forming gate stacks in active regions of the substrate. A gate stack may include a polycrystalline silicon (poly) gate, a tungsten layer on the poly, and a silicon nitride layer on the tungsten layer. Typically, the layers are formed first, and then they are patterned in turn, to form the gate stack.